Research teams at Intel Corp (INTC.O) on Saturday unveiled work that the company believes will help it keep speeding up and shrinking computing chips over the next ten years, with several technologies aimed at stacking parts of chips on top of each other.
Intel’s Research Components Group introduced the work in papers at an international conference being held in San Francisco. The Silicon Valley company is working to regain a lead in making the smallest, fastest chips that it has lost in recent years to rivals like Taiwan Semiconductor Manufacturing Co (2330.TW) and Samsung Electronics Co Ltd (005930.KS).
While Intel CEO Pat Gelsinger has laid out commercial plans aimed at regaining that lead by 2025, the research work unveiled Saturday gives a look into how Intel plans to compete beyond 2025.
One of the ways Intel is packing more computing power into chips by stacking up “tiles” or “chiplets” in three dimensions rather than making chips all as one two-dimension piece. Intel showed work Saturday that could allow for 10 times as many connections between stacked tiles, meaning that more complex tiles can be stacked on top of one another.